Advanced VLSI Design

Participants join the Advanced VLSI Design course to gain specialized skills required for careers in the fast-growing semiconductor industry. The course helps learners understand advanced chip design concepts, modern VLSI methodologies, and industry-standard design practices. It enables engineers and students to build expertise in high-performance and low-power integrated circuit design while enhancing their job prospects in VLSI, ASIC, FPGA, and semiconductor companies. The knowledge gained also prepares participants for advanced research, higher studies, and emerging technologies in electronics.

The Advanced VLSI Design course provides an in-depth understanding of modern Very Large Scale Integration (VLSI) design methodologies used in semiconductor and integrated circuit development. It covers advanced CMOS design principles, digital circuit optimization, and high-performance chip design techniques. Learners will explore timing analysis, power optimization, clock distribution, and physical design challenges. The course also explains design automation tools, layout strategies, and verification methodologies used in the VLSI industry. Real-world design constraints and trade-offs are discussed to help students understand practical chip development. Topics such as interconnect modeling, signal integrity, low-power design, and testing techniques are covered in detail. Designed by expert faculty from IIT Bombay, the course combines theoretical concepts with engineering applications. It is ideal for electronics and electrical engineering students, VLSI enthusiasts, and semiconductor professionals seeking advanced knowledge. By the end of the course, learners will be equipped with the skills required to design, analyze, and optimize complex integrated circuits for modern electronic systems.

• Historical Perspective and Future Trends in CMOS VLSI Circuit and System Design

• Historical Perspective and Future Trends in CMOS VLSI Circuit – Part II

• Logical Effort: A Way of Designing Fast CMOS Circuits

• Logical Effort: Designing Fast CMOS Circuits – Continued

• Logical Effort: Designing Fast CMOS Circuits – Part III

• Power Estimation and Control in CMOS VLSI Circuits

• Power Estimation and Control in CMOS VLSI Circuits – Continued

• Low Power Design Techniques

• Low Power Design Techniques – Part II

• Arithmetic Implementation Strategies for VLSI

• Arithmetic Implementation Strategies for VLSI – Part II

• Arithmetic Implementation Strategies for VLSI – Part III

• Arithmetic Implementation Strategies for VLSI – Part IV

• Interconnect-Aware Design: Impact of Scaling, Buffer Insertion, and Inductive Peaking

• Interconnect-Aware Design: Low Swing and Current-Mode Signaling

• Interconnect-Aware Design: Capacitively Coupled Interconnects

• Introduction to Hardware Description Languages (HDL)

• Managing Concurrency and Time in Hardware Description Languages

• Introduction to VHDL

• Basic Components in VHDL

• Structural Description in VHDL

• Behavioral Description in VHDL

• Introduction to Verilog

• FSM + Datapath (GCD Example)

• FSM + Datapath (Continued)