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Self-paced Advanced

Analog Electronic Circuit

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Trainers Rating: 3(118)
Course type: Watch to learn anytime
Duration: 1637 min
Start: Anytime
Language: English
Views: 343

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Why enroll

This course helps you build strong fundamentals in analog circuit design using simple and clear explanations. It is ideal for students and engineers who want to confidently design amplifiers and understand how real analog circuits work in practice. It also prepares you for advanced studies and industry-oriented analog and IC design roles.

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Total experience: 5+ years
Location: India

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Course details

This course introduces the fundamentals of analog electronics with a strong focus on amplifier design, which is the backbone of almost every electronic system. You will learn how electronic circuits amplify signals and how amplifiers are designed step by step using MOS transistors only, making the course highly relevant to modern IC and VLSI design. Starting from basic concepts, the course gradually builds your understanding so that you can independently design an operational amplifier by the end of the course. Along the way, important analog building blocks such as voltage regulators, current mirrors, and power amplifiers are also explained with practical insight and clear examples.

Source: NPTEL IIT Delhi [Youtube Channel]

Course suitable for

Is this course for you?

Perfect for

You work in Electronics & Instrumentation
You're a Electronics & Telecommunication professional
You have 3+ years of hands-on experience in this field
You want to build skills in Engineering & Design, Project Management

Before you enrol

Advanced level — assumes working knowledge of Electronics & Telecommunication
Self-paced video, 1637 min — watch anytime

New to Electronics & Telecommunication? Browse beginner courses →

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Course curriculum

The course is readily available, allowing learners to start and complete it at their own pace.

30 lectures27 hr 17 min

Introduction | Analog Electronic Circuit
2 min
Introduction to Analog Circuits Introduction to the Diode
56 min
Diodes, Introduction to The Transistor
53 min
MOS Device, Characteristics
57 min
DC operating point
57 min
DC operating point, amplifier design
47 min
Common source amplifier, small signal analysis
53 min
Common gate, common drain
55 min
Common gate circuit
51 min
Source degenerated amplifier
60 min
Swing limits
59 min
Swing limits contd., multi transistor amplifiers
55 min
Multi-transistor amplifiers
57 min
Introduction to current sources
57 min
Current sources/mirrors contd.
60 min
Current sources, biasing
56 min
Differential circuits
55 min
Differential amplifiers-I
56 min
Differential amplifiers-II
58 min
Differential amplifiers-III
59 min
Self biased active load diff. amp
57 min
Diff. Cascode amplifier, two stage amplifiers
61 min
Two stage diff. amps, op-amps
61 min
Op-amps, OTAs
58 min
Circuits with op-amps
54 min
Capacitance in MOS devices
54 min
Common source, drain, gate-revisited
53 min
Common gate, common drain with capacitances
56 min
Cascode, cascade-revisit with capacitance
61 min
Cascade amplifier (with capacitance)
59 min

Key topics covered

Introduction | Analog Electronic Circuit
Introduction to Analog Circuits
Introduction to the Diode
Diodes
Introduction to The Transistor
MOS Device, Characteristics
DC operating point
DC operating point, amplifier design
Common source amplifier, small signal analysis
Common gate, common drain
Common gate circuit
Source degenerated amplifier
Swing limits
Swing limits contd., multi transistor amplifiers
Multi-transistor amplifiers
Introduction to current sources
Current sources/mirrors contd.
Current sources, biasing
Differential circuits
Differential amplifiers-I
Differential amplifiers-II
Differential amplifiers-III
Self biased active load diff. amp
Diff. Cascode amplifier, two stage amplifiers
Two stage diff. amps, op-amps
Op-amps, OTAs
Circuits with op-amps
Capacitance in MOS devices
Common source, drain, gate – revisited
Common gate, common drain with capacitances
Cascode, cascade – revisit with capacitance
Cascade amplifier (with capacitance)

Opportunities that await you!

Skills & tools you'll gain

Engineering & Design

Project Management

Research & Developmnet

Career opportunities

✎ Where this fits — what comes before, what comes next

Frequently asked questions

Q: You're on-site doing a pre-commissioning check of an automotive analog sensor front-end. The loop-check is failing intermittently. You google "analog signal conditioning pre commissioning loop check order". The pressure transducer feeds a 4–20 mA receiver that converts to 1–5 V for the ECU ADC. What sequence should you verify first to isolate whether the issue is in the analog electronics or the field wiring?

A: A puts a known current into the exact electrical boundary between field and electronics. That pins the problem without mixing domains. B feels efficient, but sweeping voltage into the ADC skips the current loop physics entirely. You could miss a receiver compliance issue. C is a classic ITP habit from power circuits; a megger on analog wiring risks damage and doesn't explain an intermittent. D sounds software-savvy, but you're trusting an ADC and reference that might already be part of the fault chain.

Q: Warranty data shows a repeated ECU input failure at ~40,000 km. The analog input has a TVS diode and a series resistor. You're searching "TVS diode analog input what it does not protect against". During a jump-start event, what failure is the TVS diode least effective at preventing?

A: A is the trap. TVS devices clamp fast, high-energy spikes, not sustained DC overvoltage. B and C are exactly why the TVS was added in the DFMEA. D is usually covered as well if polarity and standoff were chosen correctly. The field failure mileage lines up with cumulative stress, not a one-off transient.

Q: You're sizing a simple RC anti-alias filter ahead of an ADC. The requirement is a -3 dB cutoff at 1.6 kHz. You type "calculate RC low pass cutoff for ADC input". If you pick R = 10 kΩ, what capacitor value gets you closest?

A: A lands at roughly 1.6 kHz with standard math. B drops the 2π term, a mistake that shows up when someone flips between ω and f. C feels conservative, but it pushes the cutoff way too low and hurts signal bandwidth. D is tempting from a BOM view, yet the cutoff jumps enough to miss the aliasing target.

Q: An op-amp based instrumentation amplifier shows rail-to-rail output on hot days only. At room temp it's fine. You search "op amp saturation high temperature field failure". Supply is 5 V, sensor is within range, layout unchanged. What's the most likely root cause?

A: A ties temperature, saturation, and an otherwise stable design together. Many automotive amps lose common-mode headroom at high temp. B explains distortion, not hard rail lock. C changes gain, but not enough to pin the output unless the sensor also moves. D flips cause and effect; the op-amp doesn't know the ADC reference exists.

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